Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

Graphs are pervasive data structures in computer science, and algorithms working with them are fundamental to the field. Many challenging problems in Very Large-Scale Integration (VLSI) physical design automation are modeled using graphs. The routing problems in VLSI physical design are, in essence,...

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書目詳細資料
主要作者:	Ch'ng, Heng Sun
格式:	Thesis
語言:	English
出版:	2007
主題:	TK Electrical engineering Electronics Nuclear engineering
在線閱讀:	http://eprints.utm.my/id/eprint/6381/1/ChNgHengSunMFKE2007.pdf
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